P1394 Mail Archive: P1394> Re: Rough SBP-2 & IP1394 core component ROM sizes

P1394 Mail Archive: P1394> Re: Rough SBP-2 & IP1394 core component ROM sizes

P1394> Re: Rough SBP-2 & IP1394 core component ROM sizes

Kazuhiro HiRATA (hirata@vip.iwa.fujixerox.co.jp)
Mon, 16 Feb 98 21:17:04 +0900

Hi, all.

My rough estimation of ROM code size of thin transport (transaction and
session) of DPP is less than 8KB with 16bit-CISC based CPU.

However, I do NOT think that focusing to only ROM size to compare
transport cost is productive discussion. The CPU power requirement that
handles the transport is also important factor to compare. The other
effective resource sizes rather than ROM should be compared to estimate
the cost.

Also, the cost requirement of consumer product is only one example of
thousand variety. Everyone could say only smaller and cheaper is better.

Estimation is not more than estimation.

We should consider which we wish either backward compatibility or future
possibility first. It must effect the cost also.

Anyway, I don't think it is better solution to use 1284.4 over SBP-2 for
PC printing. If everyone recommend to use 1284.4 for PC printing, we
should make a profile with 1284.4 over 1394 at first.

Alan or Greg, why did you choose SBP-2 based profile rather than 1284.4
at Jan. PWG?

//HiRATA@Feb.16'98 JST