/****************************************************************************/ /* */ /* FILENAME */ /* */ /* UART_FC.C */ /* */ /* DESCRIPTION */ /* */ /* This file contains the UART Flow Control specific functions. */ /* */ /* AUTHOR */ /* */ /* Leon Sheu , GVC Corporation. */ /* */ /* DATA STRUCTURES */ /* */ /* none */ /* */ /* FUNCTIONS */ /* */ /* EXT_IRQ_Initialize */ /* FIQ_Controller */ /* CTS1_Controller */ /* CTS2_Controller */ /* DSR2_Controller */ /* PIO_Initialize */ /* PIO_Write */ /* PIO_Read */ /* */ /* DEPENDENCIES */ /* */ /* nucleus.h */ /* uart_fc.h */ /* */ /* */ /* HISTORY */ /* */ /* NAME DATE REMARKS */ /* */ /* Leon Sheu 11/12/00 Created Intial Version for Flowcontrol */ /* Leon Sheu 01/25/01 Add function PIO_Read and modify */ /* function PIO_Initialize */ /* */ /****************************************************************************/ #include "nucleus.h" #include "uart_fc.h" CHAR DTR2_STOP = 0; CHAR CTS1_STOP = 0; CHAR CTS2_STOP = 0; /****************************************************************************/ /* FUNCTION */ /* */ /* EXT_IRQ_Initialize */ /* */ /* DESCRIPTION */ /* */ /* Interrupt Handler Initialization */ /* */ /* CALLED BY */ /* */ /* AP */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* irq_id : interrupt vector number to initialize */ /* priority : priority to give to the interrupt */ /* src_type : activation and sense of activation */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID EXT_IRQ_Initialize ( UINT8 irq_id,UINT32 priority,UINT32 src_type) { VOID (**oldlisr)(INT); STATUS status; UINT32 mask ,close_pio; mask = 0x1 << irq_id ; src_type = src_type << 5; switch(irq_id) { case 0:/* Register the interrupt handler for the FIQ Controller */ status = NU_Register_LISR(AIC_FIQ, FIQ_Controller, oldlisr); close_pio = 1 << PIO_FIQ ; break; case 16:/* Register the interrupt handler for the CTS1 Controller */ status = NU_Register_LISR(AIC_CTS1, CTS1_Controller, oldlisr); close_pio = 1 << PIO_CTS1 ; break; case 17:/* Register the interrupt handler for the DSR2 Controller */ status = NU_Register_LISR(AIC_DSR2, DSR2_Controller, oldlisr); close_pio = 1 << PIO_DSR2 ; break; case 18:/* Register the interrupt handler for the CTS2 Controller */ status = NU_Register_LISR(AIC_CTS2, CTS2_Controller, oldlisr); close_pio = 1 << PIO_CTS2 ; default:break; } /* Disable the interrupt on the interrupt controller */ *(unsigned*)(INT_CNTRL_BASE + AIC_IDCR) |= mask ; /* Cancel PIO Controller handling from pins managed by a peripheral */ *(unsigned*)(PIO_BASE + PIO_PDR) |= close_pio ; /* Store the Source Mode Register */ *(unsigned*)(INT_CNTRL_BASE + AIC_SMR+(irq_id)*4) = src_type | priority ; /* Clear the interrupt on the interrupt controller */ *(unsigned*)(INT_CNTRL_BASE + AIC_ICCR) |= mask ; /* Enable the interrupt on the interrupt controller */ *(unsigned*)(INT_CNTRL_BASE + AIC_IECR) |= mask ; } /****************************************************************************/ /* FUNCTION */ /* */ /* FIQ_Controller */ /* */ /* DESCRIPTION */ /* */ /* This is the entry function for the ISR that services the FIQ(P12). */ /* */ /* CALLED BY */ /* */ /* none */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* INT : Interrupt vector(0) */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID FIQ_Controller(INT vector) /* use to do cable detect */ { /* Since the variable vector does not get used in this implementation of UART_LISR, the following is placed in to prevent errors at compile time */ vector = vector; /* end of interrupt */ *(unsigned*)(INT_CNTRL_BASE+AIC_EOICR) = 0 ; } /****************************************************************************/ /* FUNCTION */ /* */ /* CTS1_Controller */ /* */ /* DESCRIPTION */ /* */ /* This is the entry function for the ISR that services the IRQ0(P9). */ /* */ /* CALLED BY */ /* */ /* none */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* INT : Interrupt vector(16) */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID CTS1_Controller(INT vector) /* CTS1 flow control in UART B */ { static UINT8 IRQ0_flag = 0; *(unsigned*)(INT_CNTRL_BASE + AIC_SMR + vector * 4) &= 0x07 ; if(IRQ0_flag == 0) { IRQ0_flag = 1; *(unsigned*)(INT_CNTRL_BASE + AIC_SMR + vector * 4) |= 0x20 ; CTS1_STOP = 1; *(unsigned*)(UART_A_BASE + US_CR) |= 0x80 ; } else { IRQ0_flag = 0; *(unsigned*)(INT_CNTRL_BASE + AIC_SMR + vector * 4) |= 0x60 ; CTS1_STOP = 0; *(unsigned*)(UART_A_BASE + US_CR) |= 0x40 ; } /* end of interrupt */ *(unsigned*)(INT_CNTRL_BASE + AIC_EOICR) = 0 ; } /****************************************************************************/ /* FUNCTION */ /* */ /* CTS2_Controller */ /* */ /* DESCRIPTION */ /* */ /* This is the entry function for the ISR that services the IRQ2(P11). */ /* */ /* CALLED BY */ /* */ /* none */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* INT : Interrupt vector(18) */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID CTS2_Controller(INT vector) /* CTS2 flow control in UART A */ { static UINT8 IRQ2_flag = 0; *(unsigned*)(INT_CNTRL_BASE + AIC_SMR + vector * 4) &= 0x07 ; if(IRQ2_flag == 0) { IRQ2_flag = 1; *(unsigned*)(INT_CNTRL_BASE + AIC_SMR + vector * 4) |= 0x20 ; CTS2_STOP = 1; *(unsigned*)(UART_B_BASE + US_CR) |= 0x80 ; } else { IRQ2_flag = 0; *(unsigned*)(INT_CNTRL_BASE + AIC_SMR + vector * 4) |= 0x60 ; CTS2_STOP = 0; *(unsigned*)(UART_B_BASE + US_CR) |= 0x40 ; } /* end of interrupt */ *(unsigned*)(INT_CNTRL_BASE + AIC_EOICR) = 0 ; } /****************************************************************************/ /* FUNCTION */ /* */ /* DSR2_Controller */ /* */ /* DESCRIPTION */ /* */ /* This is the entry function for the ISR that services the INT1(P10). */ /* */ /* CALLED BY */ /* */ /* none */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* INT : Interrupt vector(17) */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID DSR2_Controller(INT vector) /* DSR2 flow control in UART A */ { /* Since the variable vector does not get used in this implementation of UART_LISR, the following is placed in to prevent errors at compile time */ vector = vector; /* end of interrupt */ *(unsigned*)(INT_CNTRL_BASE + AIC_EOICR) = 0 ; } /****************************************************************************/ /* FUNCTION */ /* */ /* PIO_Initialize */ /* */ /* DESCRIPTION */ /* */ /* Setup pins to be Parallel IOs, as managed by the PIO. */ /* */ /* CALLED BY */ /* */ /* AP */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* pin : Defines work pins,RTS1(=19),RTS2(=16),DTR2(=17) */ /* io_select : Define the work pin as a input/output pin. */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID PIO_Initialize (UINT8 pin , UINT8 io_select) { if(io_select == 0) /* Set the GPIO as a output pin */ { /* Defines the PIOs as output */ *(unsigned*)(PIO_BASE + PIO_OER) |= (1 << pin); /* Clear PIOs with data at 0 in CODR (Clear Output Data Register) */ *(unsigned*)(PIO_BASE + PIO_CODR) |= (1 << pin); } else /* Set the GPIO as a input pin */ { /* Defines the PIOs as input */ *(unsigned*)(PIO_BASE + PIO_ODR) |= (1 << pin); } /* Defines the pins to be controlled by PIO Controller */ *(unsigned*)(PIO_BASE + PIO_PER) |= (1 << pin); } /****************************************************************************/ /* FUNCTION */ /* */ /* PIO_Write */ /* */ /* DESCRIPTION */ /* */ /* Write a data on required PIOs. */ /* */ /* CALLED BY */ /* */ /* AP */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* pin : Defines work pins,RTS1(=19),RTS2(=16),DTR2(=17) */ /* state : Defines set (=1) or clear (=0) */ /* */ /* OUTPUTS */ /* */ /* none */ /* */ /* */ /****************************************************************************/ VOID PIO_Write (UINT8 pin, UINT8 state ) { if (state == 0 ) { /* Clear PIOs with data at 0 in CODR (Clear Output Data Register) */ *(unsigned*)(PIO_BASE + PIO_CODR) |= (1 << pin) ; } else if (state == 1 ) { /* Set PIOs with data at 1 in SODR (Set Output Data Register) */ *(unsigned*)(PIO_BASE + PIO_SODR) |= (1 << pin) ; } } /****************************************************************************/ /* FUNCTION */ /* */ /* PIO_Read */ /* */ /* DESCRIPTION */ /* */ /* Read the state of the PIO pins. */ /* */ /* CALLED BY */ /* */ /* AP */ /* */ /* CALLS */ /* */ /* none */ /* */ /* INPUTS */ /* */ /* pin : Defines work pin */ /* */ /* OUTPUTS */ /* */ /* pin state : set(1) , clear(0) */ /* */ /* */ /****************************************************************************/ UINT32 PIO_Read (UINT8 pin) { UINT32 val=0; val |= (1 << pin); if( *(unsigned*)(PIO_BASE + PIO_PDSR) & val) return 1; else return 0; }